Computer Architecture and Organization (CSC3750)
Project 01
The assignment is a multipart assignment. The overall goal is to develop a virtual computer (VC) that can execute a simple set of machine-level program instructions.
Part 1: Instruction Set Architecture Definition
& Virtual Computer Assembler
In this part of the assignment, your task is to implement an assembler that can translate assembly-level instructions into virtual-computer machine instructions (VCI). The VC assembly-level instructions define the VC’s ISA (Instruction Set Architecture). The VC register set and ISA are defined below, along with the VC instruction formats. Use Visual Studio 2019 with C# to implement the assembler as a console-based application.
Virtual Computer Register Set
ACC – 32-bit Accumulator
REG_A – 32-bit General Purpose Register
REG_B– 32-bit General Purpose Register
REG_C – 32-bit General Purpose Register
REG_D – 32-bit General Purpose Register
CMP – Stores the result of a comparison operation (0, 1, -1)
PC – Program Counter
Virtual Computer Instruction Set Architecture (ISA)
Special Instructions
HALT – Transfers control to the operating system
Clear Instructions
CLR ACC – Sets ACC to 0
CLR REG_A – Sets REG_A to 0
CLR REG_B – Sets REG_B to 0
CLR REG_C – Sets REG_C to 0
CLR REG_D – Sets REG_D to 0
Add Instructions
ADD REG_A – Add the 32-bit integer value stored in REG_A to ACC
ADD REG_B – Add the 32-bit integer value stored in REG_B to ACC
ADD REG_C – Add the 32-bit integer value stored in REG_C to ACC
ADD REG_D – Add the 32-bit integer value stored in REG_D to ACC
Move Instructions
MOV ACC REG_A – Moves a 32-bit integer value from REG_A to ACC
MOV ACC REG_B – Moves a 32-bit integer value from REG_B to ACC
MOV ACC REG_C – Moves a 32-bit integer value from REG_C to ACC
MOV ACC REG_D – Moves a 32-bit integer value from REG_D to ACC
MOV REG_A ACC – Moves a 32-bit integer value from ACC to REG_A
MOV REG_B ACC – Moves a 32-bit integer value from ACC to REG_B
MOV REG_C ACC – Moves a 32-bit integer value from ACC to REG_C
MOV REG_D ACC – Moves a 32-bit integer value from ACC to REG_D
MOVI REG_A VALUE – Moves a literal 32-bit integer value into REG_A
MOVI REG_B VALUE – Moves a literal 32-bit integer value into REG_B
MOVI REG_C VALUE – Moves a literal 32-bit integer value into REG_C
MOVI REG_D VALUE – Moves a literal 32-bit integer value into REG_D
Store Instructions
STORE REG_A ADDR – Stores a 32-bit integer value from REG_A to the memory location defined by ADDR
STORE REG_B ADDR – Stores a 32-bit integer value from REG_A to the memory location defined by ADDR
STORE REG_C ADDR – Stores a 32-bit integer value from REG_A to the memory location defined by ADDR
STORE REG_D ADDR – Stores a 32-bit integer value from REG_A to the memory location defined by ADDR
Load Instructions
LOAD REG_A ADDR – Loads a 32-bit integer value from the memory location defined by ADDR to REG_A
LOAD REG_B ADDR – Loads a 32-bit integer value from the memory location defined by ADDR to REG_B
LOAD REG_C ADDR – Loads a 32-bit integer value from the memory location defined by ADDR to REG_C
LOAD REG_D ADDR – Loads a 32-bit integer value from the memory location defined by ADDR to REG_D
Compare Instructions
CMP REG_A – Compares the 32-bit integer value stored in REG_A to ACC
CMP REG_B – Compares the 32-bit integer value stored in REG_B to ACC
CMP REG_C – Compares the 32-bit integer value stored in REG_C to ACC
CMP REG_D – Compares the 32-bit integer value stored in REG_D to ACC
Virtual Computer Instruction Format (Opcodes, Machine Code)
HALT – 0x2000
CLR ACC – 0x1000
CLR REG_A – 0x1001
CLR REG_B – 0x1002
CLR REG_C – 0x1003
CLR REG_D – 0x1004
ADD REG_A – 0x0001
ADD REG_B – 0x0002
ADD REG_C – 0x0003
ADD REG_D – 0x0004
MOV ACC REG_A – 0x0101
MOV ACC REG_B– 0x0102
MOV ACC REG_C– 0x0103
MOV ACC REG_D– 0x0104
MOV REG_A ACC– 0x0201
MOV REG_B ACC – 0x0202
MOV REG_C ACC – 0x0203
MOV REG_D ACC – 0x0204
MOVI REG_A VALUE – 0x0601 IMMEDIATE_VALUE
MOVI REG_B VALUE – 0x0602 IMMEDIATE_VALUE
MOVI REG_C VALUE – 0x0603 IMMEDIATE_VALUE
MOVI REG_D VALUE – 0x0604 IMMEDIATE_VALUE
STORE REG_A ADDR – 0x0301 ADDR
STORE REG_B ADDR – 0x0302 ADDR
STORE REG_C ADDR – 0x0303 ADDR
STORE REG_D ADDR – 0x0304 ADDR
LOAD REG_A ADDR – 0x0401 ADDR
LOAD REG_B ADDR – 0x0402 ADDR
LOAD REG_C ADDR – 0x0403 ADDR
LOAD REG_D ADDR – 0x0404 ADDR
CMP REG_A – 0x0501
CMP REG_B – 0x0502
CMP REG_C – 0x0503
CMP REG_D – 0x0504
Virtual Computer Assembler
Implement an assembler to assemble the VC ISA instructions into VC machine code, also called opcode (operation-code). Store the generated machine code as ASCII characters in a text file. Store each generated machine opcode on a separate line. The assembler should be written using the C# programming language.
Here’s an example VC assembly program:
CLR ACC
MOVI REG_A 0x0000 0001
ADD REG_A
MOVI REG_B 0x0000 0002
ADD REG_B
MOV REG_C ACC
HALT
Here’s an example VC assembly program:
CLR ACC
LOAD REG_A 0x0400 0000
ADD REG_A
LOAD REG_B 0x0400 0004
ADD REG_B
MOVE REG_C ACC
STORE REG_C 0x0800 0000
HALT
Part 2: Virtual Computer Program Loader & Step-Through Debugger
In this part of the assignment, your task is to implement a VC Program Loader and a Step-Through Debugger. Use Visual Studio 2019 with C# to implement the Program Loader and Step-Through Debugger as a Windows-based Graphical User Interface (GUI) application. The GUI should include TextBoxes to display the Register values and a GridView to display the VC memory. Values in memory should be stored in an ASCII text file with each memory location/memory value pair on a line together. This ASCII text file represents the VC Virtual Memory component.
Virtual Computer Virtual Memory ASCII File Example
0x0040 0000 0x0000 0001
0x0040 0002 0x0000 0002
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1 | 2 | 3 | 4 | 5 | 6 | 7 |
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22 | 23 | 24 | 25 | 26 | 27 | 28 |
29 | 30 | 1 | 2 | 3 | 4 | 5 |